diff --git a/ReceptionTrame_lib/receptionTrame_com.vhd b/ReceptionTrame_lib/receptionTrame_com.vhd index a353b1b..b5ebd44 100644 --- a/ReceptionTrame_lib/receptionTrame_com.vhd +++ b/ReceptionTrame_lib/receptionTrame_com.vhd @@ -30,7 +30,7 @@ ENTITY receptionTrame_com IS END receptionTrame_com; ARCHITECTURE arch of receptionTrame_com IS -TYPE state IS (waiting, syncBreak0, syncBreak1, syncFieldWait, syncFieldStart, syncFieldData, syncFieldStop, idFieldWait, idFieldStart, idFieldData, idFieldStop); +TYPE state IS (waiting, syncBreak0, syncBreak1, syncFieldWait, syncFieldStart, syncFieldData, syncFieldStop, idFieldWait, idFieldStart, idFieldData, idFieldStop, dataFieldWait, dataFieldStart, dataFieldData, dataFieldStop); SIGNAL cState, nState : state; BEGIN @@ -120,7 +120,39 @@ CASE cState IS WHEN idFieldStop => if(n_0 = '1') then if(LinSYnchro = '1') then - nState <= waiting; -- data frame + nState <= dataFieldWait; + else + nState <= waiting; + end if; + end if; + + WHEN dataFieldWait => + if(LinSynchro = '0') then + nState <= dataFieldStart; + end if; + + WHEN dataFieldStart => + if(n_0 = '1') then + if(LinSynchro = '0') then + nState <= dataFieldData; + else + nState <= waiting; + end if; + end if; + + WHEN dataFieldData => + if(nbBit_0 = '1') then + nState <= dataFieldStop; + end if; + + WHEN dataFieldStop => + if(n_0 = '1') then + if(LinSynchro = '1') then + if(nbData_0 = '1') then + nState <= waiting; + else + nState <= dataFieldWait; + end if; else nState <= waiting; end if; @@ -260,6 +292,35 @@ BEGIN nbBit_LOAD <= '0'; n_EN <= '1'; end if; + + WHEN idFieldStop => + if(n_0 = '1') then + if(LinSynchro = '1') then + nbData_LOAD <= '1'; + else + -- ERROR id stop + end if; + else + n_LOAD <= '0'; + n_EN <= '1'; + end if; + + WHEN dataFieldWait => + if(LinSynchro = '0') then + n_SELECT <= '1'; + n_LOAD <= '1'; + end if; + + WHEN dataFieldStart => + if(n_0 = '1') then + n_SELECT <= '0'; + n_LOAD <= '1'; + nbBit_SELECT <= '1'; + nbBit_LOAD <= '1'; + else + n_LOAD <= '0'; + n_EN <= '1'; + end if; WHEN others =>