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DMA screen update

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This commit is contained in:
leo 2023-08-24 15:41:00 +02:00
parent 4bad995d15
commit b478600af6
Signed by: leo
GPG Key ID: 0DD993BFB2B307DB
9 changed files with 115 additions and 24 deletions
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2
Core/Inc/lcdio.h
View File

@ -18,4 +18,6 @@ uint32_t LCD_IO_ReadData_m(uint16_t RegValue, uint8_t ReadSize);
void LCD_IO_WriteReg(uint16_t Reg);
void LCD_IO_WriteData(uint16_t RegValue);
uint16_t* LCD_IO_getDataPt(void);
#endif /* INC_LCDIO_H_ */

2
Core/Inc/stm32f1xx_hal_conf.h
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@ -42,7 +42,7 @@
/*#define HAL_CORTEX_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_DMA_MODULE_ENABLED */
#define HAL_DMA_MODULE_ENABLED
/*#define HAL_ETH_MODULE_ENABLED */
/*#define HAL_FLASH_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED

1
Core/Inc/stm32f1xx_it.h
View File

@ -56,6 +56,7 @@ void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void TIM4_IRQHandler(void);
void DMA2_Channel1_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */

2
Core/Src/home_screen.c
View File

@ -156,5 +156,5 @@ void Home_Screen_Gen(pse_unit* pse_units, uint8_t pse_unit_num){
}
// fade in the new screen
lv_scr_load_anim(scr, LV_SCR_LOAD_ANIM_FADE_ON, 500, 100, false);
lv_scr_load_anim(scr, LV_SCR_LOAD_ANIM_FADE_ON, 0, 0, false);
}

4
Core/Src/lcdio.c
View File

@ -38,3 +38,7 @@ void LCD_IO_WriteReg(uint16_t Reg) {
void LCD_IO_WriteData(uint16_t RegValue) {
*LCD_RAM = RegValue;
}
uint16_t* LCD_IO_getDataPt(void){
return LCD_RAM;
}

78
Core/Src/main.c
View File

@ -59,12 +59,19 @@ TIM_HandleTypeDef htim4;
UART_HandleTypeDef huart1;
DMA_HandleTypeDef hdma_memtomem_dma2_channel1;
SRAM_HandleTypeDef hsram1;
/* USER CODE BEGIN PV */
void XferCpltCallback(DMA_HandleTypeDef *hdma);
static lv_disp_draw_buf_t disp_buf;
static lv_color_t buf_1[BUFF_SIZE];
static lv_color_t buf_2[BUFF_SIZE];
static int32_t drawY, drawXmin, drawYmax, drawLineLen;
static lv_color_t* drawBuf;
static lv_disp_drv_t* drawDisp;
ADS7843_Def Touch_Def = {
.CS_GPIO_Port = ADS7843_CS_GPIO_Port,
@ -123,6 +130,7 @@ pse_stepper_conf pse_stepper_confs[PSE_STEPPER_NUM] = {
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_DMA_Init(void);
static void MX_FSMC_Init(void);
static void MX_USART1_UART_Init(void);
static void MX_TIM4_Init(void);
@ -142,16 +150,17 @@ PUTCHAR_PROTOTYPE
// LVGL screen update function
void my_flush_cb(lv_disp_drv_t * disp, const lv_area_t * area, lv_color_t * buf){
int32_t x, y;
for(y = area->y1; y <= area->y2; y++) {
ILI9341_SetCursor(area->x1,y);
ILI9341_WriteRam();
for(x = area->x1; x <= area->x2; x++) {
LCD_IO_WriteData(*(uint16_t*)buf);
buf++;
}
}
lv_disp_flush_ready(disp);
drawY = area->y1;
drawXmin = area->x1;
drawYmax = area->y2;
ILI9341_SetCursor(area->x1,drawY);
ILI9341_WriteRam();
drawLineLen = (area->x2 - area->x1);
drawY++;
drawBuf = buf;
drawDisp = disp;
hdma_memtomem_dma2_channel1.XferCpltCallback=&XferCpltCallback;
HAL_DMA_Start_IT(&hdma_memtomem_dma2_channel1, (uint32_t)buf, (uint32_t)LCD_IO_getDataPt(), drawLineLen);
}
// LVGL input update function
@ -201,6 +210,7 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_DMA_Init();
MX_FSMC_Init();
MX_USART1_UART_Init();
MX_TIM4_Init();
@ -220,7 +230,7 @@ int main(void)
lv_init();
// Add the display buffer to LVGL
lv_disp_draw_buf_init(&disp_buf, buf_1, NULL, BUFF_SIZE);
lv_disp_draw_buf_init(&disp_buf, buf_1, buf_2, BUFF_SIZE);
// initilize LVGL display
lv_disp_drv_t disp_drv;
@ -434,6 +444,38 @@ static void MX_USART1_UART_Init(void)
}
/**
* Enable DMA controller clock
* Configure DMA for memory to memory transfers
* hdma_memtomem_dma2_channel1
*/
static void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA2_CLK_ENABLE();
/* Configure DMA request hdma_memtomem_dma2_channel1 on DMA2_Channel1 */
hdma_memtomem_dma2_channel1.Instance = DMA2_Channel1;
hdma_memtomem_dma2_channel1.Init.Direction = DMA_MEMORY_TO_MEMORY;
hdma_memtomem_dma2_channel1.Init.PeriphInc = DMA_PINC_ENABLE;
hdma_memtomem_dma2_channel1.Init.MemInc = DMA_MINC_DISABLE;
hdma_memtomem_dma2_channel1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_memtomem_dma2_channel1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
hdma_memtomem_dma2_channel1.Init.Mode = DMA_NORMAL;
hdma_memtomem_dma2_channel1.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_memtomem_dma2_channel1) != HAL_OK)
{
Error_Handler( );
}
/* DMA interrupt init */
/* DMA2_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Channel1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA2_Channel1_IRQn);
}
/**
* @brief GPIO Initialization Function
* @param None
@ -591,6 +633,20 @@ static void MX_FSMC_Init(void)
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef* htim){
pse_stepper_planer_tick(pse_units, PSE_UNITS_NUM);
}
void XferCpltCallback(DMA_HandleTypeDef *hdma){
if(drawY > drawYmax){
lv_disp_flush_ready(drawDisp);
return;
}
ILI9341_SetCursor(drawXmin,drawY);
ILI9341_WriteRam();
drawY++;
drawBuf+=drawLineLen+1;
hdma_memtomem_dma2_channel1.XferCpltCallback=&XferCpltCallback;
HAL_DMA_Start_IT(&hdma_memtomem_dma2_channel1, (uint32_t)drawBuf, (uint32_t)LCD_IO_getDataPt(), drawLineLen);
}
/* USER CODE END 4 */
/**

15
Core/Src/stm32f1xx_it.c
View File

@ -56,6 +56,7 @@
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_memtomem_dma2_channel1;
extern TIM_HandleTypeDef htim4;
/* USER CODE BEGIN EV */
@ -212,6 +213,20 @@ void TIM4_IRQHandler(void)
/* USER CODE END TIM4_IRQn 1 */
}
/**
* @brief This function handles DMA2 channel1 global interrupt.
*/
void DMA2_Channel1_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Channel1_IRQn 0 */
/* USER CODE END DMA2_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_memtomem_dma2_channel1);
/* USER CODE BEGIN DMA2_Channel1_IRQn 1 */
/* USER CODE END DMA2_Channel1_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

2
Drivers/lv_conf.h
View File

@ -49,7 +49,7 @@
#define LV_MEM_CUSTOM 0
#if LV_MEM_CUSTOM == 0
/*Size of the memory available for `lv_mem_alloc()` in bytes (>= 2kB)*/
#define LV_MEM_SIZE (48U * 1024U) /*[bytes]*/
#define LV_MEM_SIZE (32U * 1024U) /*[bytes]*/
/*Set an address for the memory pool instead of allocating it as a normal array. Can be in external SRAM too.*/
#define LV_MEM_ADR 0 /*0: unused*/

33
PSE.ioc
View File

@ -2,6 +2,17 @@
CAD.formats=
CAD.pinconfig=
CAD.provider=
Dma.MEMTOMEM.0.Direction=DMA_MEMORY_TO_MEMORY
Dma.MEMTOMEM.0.Instance=DMA2_Channel1
Dma.MEMTOMEM.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
Dma.MEMTOMEM.0.MemInc=DMA_MINC_DISABLE
Dma.MEMTOMEM.0.Mode=DMA_NORMAL
Dma.MEMTOMEM.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
Dma.MEMTOMEM.0.PeriphInc=DMA_PINC_ENABLE
Dma.MEMTOMEM.0.Priority=DMA_PRIORITY_LOW
Dma.MEMTOMEM.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
Dma.Request0=MEMTOMEM
Dma.RequestsNb=1
FATFS.IPParameters=_MAX_SS
FATFS._MAX_SS=512
File.Version=6
@ -9,15 +20,16 @@ GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false
Mcu.CPN=STM32F103VET6
Mcu.Family=STM32F1
Mcu.IP0=FATFS
Mcu.IP1=FSMC
Mcu.IP2=NVIC
Mcu.IP3=RCC
Mcu.IP4=SDIO
Mcu.IP5=SYS
Mcu.IP6=TIM4
Mcu.IP7=USART1
Mcu.IPNb=8
Mcu.IP0=DMA
Mcu.IP1=FATFS
Mcu.IP2=FSMC
Mcu.IP3=NVIC
Mcu.IP4=RCC
Mcu.IP5=SDIO
Mcu.IP6=SYS
Mcu.IP7=TIM4
Mcu.IP8=USART1
Mcu.IPNb=9
Mcu.Name=STM32F103V(C-D-E)Tx
Mcu.Package=LQFP100
Mcu.Pin0=PE2
@ -75,6 +87,7 @@ Mcu.UserName=STM32F103VETx
MxCube.Version=6.9.1
MxDb.Version=DB.6.0.91
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DMA2_Channel1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@ -269,7 +282,7 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_FSMC_Init-FSMC-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_TIM4_Init-TIM4-false-HAL-true,6-MX_FATFS_Init-FATFS-false-HAL-false,7-MX_SDIO_SD_Init-SDIO-false-HAL-true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_FSMC_Init-FSMC-false-HAL-true,5-MX_USART1_UART_Init-USART1-false-HAL-true,6-MX_TIM4_Init-TIM4-false-HAL-true,7-MX_FATFS_Init-FATFS-false-HAL-false,8-MX_SDIO_SD_Init-SDIO-false-HAL-true
RCC.ADCFreqValue=32000000
RCC.AHBFreq_Value=64000000
RCC.APB1CLKDivider=RCC_HCLK_DIV2