154 lines
4.0 KiB
VHDL
154 lines
4.0 KiB
VHDL
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-- Company:
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-- Engineer:
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--
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-- Create Date: 30.11.2021 10:35:30
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-- Design Name:
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-- Module Name: Gene_Snake - Behavioral
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-- Project Name:
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-- Target Devices:
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-- Tool Versions:
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-- Description:
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--
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-- Dependencies:
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--
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-- Revision:
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-- Revision 0.01 - File Created
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-- Additional Comments:
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--
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----------------------------------------------------------------------------------
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-- a faire:
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-- - faire bouger le snake
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-- - ajouter une clk
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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-- Uncomment the following library declaration if using
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-- arithmetic functions with Signed or Unsigned values
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use IEEE.NUMERIC_STD.ALL;
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library ourTypes;
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use ourTypes.types.all;
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-- Uncomment the following library declaration if instantiating
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-- any Xilinx leaf cells in this code.
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--library UNISIM;
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--use UNISIM.VComponents.all;
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entity Gene_Snake is
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generic( addressSize : integer:=10);
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Port ( X : in unsigned (9 downto 0);
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Y : in unsigned (8 downto 0);
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clk: in std_logic;
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reset: in std_logic;
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currentSnake : in pos;
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updateOrder : in std_logic;
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listRef : in unsigned(addressSize-1 downto 0);
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snakePresent : out std_logic;
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currentAddress : out unsigned(addressSize-1 downto 0);
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matAddress : out unsigned(addressSize-1 downto 0)
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);
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end Gene_Snake;
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architecture Behavioral of Gene_Snake is
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-- D???claration des signaux
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signal snakeHere: std_logic; --1 si on doit afficher le pixel 0 sinon
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signal dx : signed(1 downto 0);
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signal dy : signed(1 downto 0);
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signal running : std_logic;
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begin
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---- Process d'initialisation
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--process(mat,snake,reset,current_index)
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--variable current_dir : direction;
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--begin
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-- if(reset='0')
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-- then
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-- update <= '0';
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-- current_index <= to_unsigned(0,11);
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-- for x in 0 to 39 loop
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-- for y in 0 to 29 loop
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-- mat(x,y) <= to_unsigned(snake'length-1,11);
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-- end loop;
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-- end loop;
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-- mat(0,0) <= to_unsigned(0,11);
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-- mat(1,0) <= to_unsigned(1,11);
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-- snake(0).X <= to_unsigned(8,10);
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-- snake(0).Y <= to_unsigned(8,9);
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-- snake(0).dir <= droite;
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-- snake(0).isDefined <= '1';
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-- snake(1).X <= to_unsigned(24,10);
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-- snake(1).Y <= to_unsigned(8,9);
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-- snake(1).dir <= droite;
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-- snake(1).isDefined <= '1';
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-- for i in 2 to snake'length-1 loop
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-- snake(i).X <= to_unsigned(0,10);
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-- snake(i).Y <= to_unsigned(0,9);
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-- snake(i).dir <= gauche;
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-- snake(i).isDefined <= '0';
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-- end loop;
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-- elsif(clk_rapide'event and clk_rapide = '1')
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-- then
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-- snake(to_integer(current_index)) <= updatedSnake;
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-- current_index <= updatedIndex;
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-- end if;
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-- if (to_integer(current_index) = snake'length) then
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-- update <= '0';
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-- current_index <= to_unsigned(0,11);
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-- end if;
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-- if(clk_lente'event and clk_lente = '1')
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-- then
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-- update <= '1';
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-- end if;
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--end process;
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-- Process de calcul d'affichage
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process(X,Y,clk,reset,running,dx,dy,updateOrder,index)
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begin
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if(reset = '0') then
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dx <= to_signed(-1,2);
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dy <= to_signed(-1,2);
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elsif(clk'event and clk = '1' and running = '1') then
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if(currentSnake.isDefined= '1') then
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if(X>=currentSnake.X-8 and X<=currentSnake.X+8 and Y>=currentSnake.Y-8 and Y<=currentSnake.Y+8) then
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snakeHere <= '1';
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end if;
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end if;
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dx <= dx + 1;
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if(dx = 2) then
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dx <= to_signed(-1,2);
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dy <= dy + 1;
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end if;
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end if;
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if(dy = 2) then
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dy <= to_signed(-1,2);
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running <= '0';
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end if;
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if(updateOrder'event and updateOrder = '1') then
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running <= '1';
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snakeHere <= '0';
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end if;
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end process;
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matAddress <= resize(shift_right(Y,4)*40+shift_right(X,4),SNAKE_ADDRESS_SIZE); --on resize parce qu'il as décidé que le resultat faisait 18bits au lieu des 11 attendus
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currentAddress <= listRef;
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snakePresent <= snakeHere;
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end Behavioral;
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