synthesis

This commit is contained in:
leo 2023-09-25 14:32:57 +02:00
parent 20556157db
commit 0d98c531a8
Signed by: leo
GPG Key ID: 0DD993BFB2B307DB
2 changed files with 14 additions and 2 deletions

1
.gitignore vendored
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@ -1,2 +1,3 @@
**/build
fusesoc_libraries
vivado*.*

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@ -19,7 +19,7 @@ targets:
default: &default
filesets:
- rtl
toplevel: InterfaceMicroprocesseur_SousTest
toplevel: InterfaceMicroprocesseur
parameters:
- clk_freq_hz
@ -36,4 +36,15 @@ targets:
- -fsynopsys
run_options:
- --wave=waveform.ghw --stop-time=2us
parameters:
parameters:
synth:
<<: *default
description: Synthesize the design
default_tool: vivado
filesets_append:
tools:
vivado:
part: xc7a35tcpg236-1
pnr: none
parameters: