leo/linreceiver-vhdl

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InterfaceMicroprocesseur_lib

Update from HDLDesigner srcs, (HDLDesigner will be the bane of my existence)

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LIN_Rec_Test_Env_2022_IP

increased tb hold time

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ReceptionTrame_lib

byte count fix

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sync break

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.gitignore

synthesis

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Update from HDLDesigner srcs, (HDLDesigner will be the bane of my existence)

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internalstate_struct.vhd

byte count fix

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README.md

README

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recepteurlin_struct.vhd

sensible names for components

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recepteurlin_undertest_struct.vhd

Update from HDLDesigner srcs, (HDLDesigner will be the bane of my existence)

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RecepteurLIN.core

added decoder to filelist, fixes errors management

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waveform.ghw

chronogramme

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README.md

Recepteur LIN

Circuit design project, ETN4

Usage

Uses fusesoc for building with GHDL for the compilation and Vivado for the synthesis/implementation.

Simulate the whole design

fusesoc run --target=sim etn4:conceptionCircuit:recepteurLIN:1.0.0

Generate a .ghw wave file in build/etn4_conceptionCircuit_recepteurLIN_1.0.0/sim-ghdl/waveform.ghw readable with GTKWave for example.

Synthesize the whole design

fusesoc run --target=synth etn4:conceptionCircuit:recepteurLIN:1.0.0

Generate a .xpr file in build/etn4_conceptionCircuit_recepteurLIN_1.0.0/synth-vivado/etn4_conceptionCircuit_recepteurLIN_1.0.0.xpr readable in Vivado.