nbBit counter

ReceptionTrame_lib/receptionTrame_op.vhd

@@ -6,7 +6,7 @@ USE ieee.numeric_std.all;
 ENTITY receptionTrame_op IS
   GENERIC(
     N: integer := 1200;
-    N_WIDTH : integer := 0
+    N_WIDTH : integer := 11
   );
   PORT(
     H: IN std_logic;
@@ -194,4 +194,20 @@ with nbBit_SELECT SELECT
     to_unsigned(13, 4) when '0',
     to_unsigned(8, 4) when '1',
     to_unsigned(0, 4) when others;
+
+nbBIt_cmp : counter
+  GENERIC MAP(
+    WIDTH => 4,
+    MAX_VAL => 0
+  )
+  PORT MAP(
+    H => H,
+    H_EN => nbBit_EN,
+    nRst => nCLR,
+    INIT => nbBit_INIT,
+    LOAD => nbBit_LOAD,
+    upnDown => '0',
+    val => OPEN,
+    max => nbBit_0
+  );
 END ARCHITECTURE arch;